Cerebras scales trillion‑parameter models across wafer‑scale chips
Hello everyone, and welcome to Daywire. Let's make sense of the tech news. It's October twenty six, two thousand twenty six. We begin with our lead story. Cerebras says its new WSE‑3T wafer can hold a single 16 GB dense or linear‑attention layer, and it strings several wafers together to cover trillion‑parameter models. By using linear‑attention, which skips the key‑value cache, two 16 GB layers fit on each wafer, and a compiler places the layers while an RDMA‑enabled runtime shuttles token activations between wafers in about two microseconds per hop. The result is low‑latency inference that hits 88.3 percent on Terminal‑Bench two point one and 91.2 percent on BrowseComp. Engineers can try it now via Cerebras’ free cloud API, but they have to respect the 16 GB‑per‑layer limit and the cache‑free trade‑off when scaling across wafers.
